Compartir
High-Performance Computing on the Intel(r) Xeon Phi(tm): How to Fully Exploit MIC Architectures (en Inglés)
Qing Zhang
(Autor)
·
Bo Shen
(Autor)
·
Endong Wang
(Autor)
·
Springer
· Tapa Blanda
High-Performance Computing on the Intel(r) Xeon Phi(tm): How to Fully Exploit MIC Architectures (en Inglés) - Wang, Endong ; Zhang, Qing ; Shen, Bo
$ 234.096
$ 468.193
Ahorras: $ 234.096
Elige la lista en la que quieres agregar tu producto o crea una nueva lista
✓ Producto agregado correctamente a la lista de deseos.
Ir a Mis Listas
Origen: Estados Unidos
(Costos de importación incluídos en el precio)
Se enviará desde nuestra bodega entre el
Miércoles 31 de Julio y el
Miércoles 14 de Agosto.
Lo recibirás en cualquier lugar de Colombia entre 1 y 5 días hábiles luego del envío.
Reseña del libro "High-Performance Computing on the Intel(r) Xeon Phi(tm): How to Fully Exploit MIC Architectures (en Inglés)"
The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel(R) Xeon Phi(TM) series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors' first-hand optimization experience.The material is organized in three sections. The first section, "Basics of MIC", introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on "Performance Optimization" explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, "Project development" presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.This book appeals to two main audiences: First, software developers for HPC applications - it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing - it will guide them on how to push the limits of system performance for HPC applications.
