Taming the Infinities of Concurrency: Essays Dedicated to Javier Esparza on the Occasion of His 60th Birthday (en Inglés)
Reseña del libro "Taming the Infinities of Concurrency: Essays Dedicated to Javier Esparza on the Occasion of His 60th Birthday (en Inglés)"
Javier Esparza received his primary degree in Theoretical Physics and in 1990 his PhD in Computer Science from the University of Zaragoza. After positions at the University of Hildesheim, the University of Edinburgh, and the Technical University of Munich, he then held professorships at the University of Edinburgh and the University of Stuttgart, and finally returned to TU Munich where he currently holds the Chair of Foundations of Software Reliability and Theoretical Computer Science. Javier is a leading researcher in concurrency theory, distributed and probabilistic systems, Petri nets, analysis of infinite-state models, and more generally formal methods for the verification of computer systems. He has coauthored over 200 publications, many of them highly influential. He coauthored the monographs Free Choice Petri Nets, and Unfoldings: A Partial Order Approach to Model Checking, and more recently the textbook Automata Theory: An Algorithmic Approach. The latter is an exampleof Javier's many activities as a teacher, he has supervised more than 20 PhD students, taught at more than 20 summer schools, and won many awards for his university teaching. He is regularly invited to deliver plenary talks at prestigious computer science conferences and participate in senior program committees, he has contributed as a senior member of technical working groups, society councils, and journal editorial boards, and in 2021 he became a founding Editor-in-Chief of the open-access TheoretiCS journal. This Festschrift celebrates Javier's contributions on the occasion of his 60th birthday, the contributions reflect the breadth and depth of his successes in Petri nets, concurrency in general, distributed and probabilistic systems, games, formal languages, logic, program analysis, verification, and synthesis.
